Defence Science and Technology Group

DST Group Australia Develops a 25-45 GHz SiGe Receiver Using Analog Office
Analog Office provided the design team with a significant advantage by enabling us to create our own custom PCells to work in tandem with the authorized foundry kit. This boosted the PDK’s capabilities and simplified the entire SiGe design flow, improving the accuracy of the layouts and enabling complex structures to be drawn efficiently instead of relying on manual methods.
Leigh Milner
Microelectronics Research Engineer
Defence Science and Technology Group

Defence Science and Technology (DST) Group Australia Develops 25-45 GHz SiGe Receiver

Company Profile

The Defence Science and Technology (DST) Group is part of Australia’s Department of Defence and is the second largest publicly funded R&D organization in Australia. DST Group is a national leader, safeguarding Australia by delivering valued scientific advice and innovative solutions for defence and national security and providing value through its capacity to reduce and mitigate strategic and operational risks and to create and maintain a capability edge over potential adversaries.

The Design Challenge

The Cyber and Electronic Warfare Division of Australia’s Department of Defence has an R&D program to develop broadband RFIC receivers. A broadband receiver covering 25-45 GHz was desired with moderate noise figure of less than 6 dB, gain flatness less than ± 1 dB, high IIP3 greater than 0 dBm, and large image rejection more than 30 dB. Balancing these requirements over the large operating bandwidth from 25-45 GHz was a challenging task, requiring a design tool with extensive RF and electromagnetic (EM) simulation and efficient optimization approaches. The EM simulations were performed on complex multi-metal layer silicon germanium (SiGe) processes to capture the parasitic behavior of on-chip passive structures and interconnects that could impair the overall performance of the RFIC. In addition, the chip needed to pass layout-versus-schematic (LVS) and design-rule-checking (DRC) for acceptance (sign off) by the foundry.

The Solution

DST Group Australia chose AWR software, specifically Analog Office RFIC design software, to design this chip using a commercially available SiGe process. While the foundry process design kit (PDK) contained basic components such as heterojunction bipolar transistors (HBTs), complementary metal oxide semiconductor (CMOS) field-effect transistors (FETs), resistors, capacitors, diodes, and pads, the design team realized there was a significant advantage to be gained by creating custom parameterized cells (PCells) within Analog Office to work in tandem with the foundry kit. The custom PCells boosted the capabilities of the foundry PDK, simplifying the SiGe design flow by allowing complex structures to be drawn efficiently instead of relying entirely on manual methods. In addition to saving engineering time, the new capability helped improve the accuracy of the layouts by eliminating potential data entry errors.

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Video Presentation of 25-45 GHz RFIC SiGe Receiver

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