Epic Communications

Epic Communications Designs Customized RFIC Transceivers with Analog Office in Record Time
AWR Analog Office has provided the Epicom design team with a unified, easy-to-use, and fully integrated RFIC design suite, which enabled us to obtain our complex RFIC silicon tape-out on a short schedule.
Cindy H. C. Yuen
Vice President of Engineering
Epic Communications

Leveraging its Design Experience and Success with Microwave Office, Epic Communications Designs Customized RFIC Transceivers with Analog Office in Record Time

Design challenge at Epic Communications

Epic Communications (Epicom) has embarked on the design of a customized transceiver using a silicon germanium (SiGe) bipolar complimentary metal oxide semiconductor (BiCMOS) process. Initially, the integrated circuit (IC) implementation includes development of a transmitter, receiver, and a synthesizer including a voltage-controlled oscillator (VCO) and phase-locked loop (PLL).

The Epicom design team combines strengths in wireless system architecture and active device design, as well as passive RF components. The team had already used Microwave Office® software for the design of numerous monolithic microwave IC (MMIC) products, such as low-noise amplifiers (LNAs), power amplifiers (PAs), and integrated passive devices (IPDs), with both active and passive circuits on a single die. The designers were comfortable incorporating Analog Office into their design flow as the tool of choice for their RFIC transceiver.

Epicom recognized the need for an easy-to-use and intuitive environment similar to Microwave Office for the design of the RF transceiver silicon. The environment was required to support the integration of existing intellectual property (IP) blocks implemented in formats from different tool vendors. Epicom designers wanted a complete design suite covering design entry and physical layout, time- and frequency-domain circuit simulation capabilities, a tighter link between the electrical and physical circuitry, a platform for integration of existing IP blocks, and an interface for a foundry-supported physical verification engine. The tape-out schedule was tight, with limited resources dedicated to the project. In addition to design work, the circuit designer was responsible for the layout implementation, so limited design iteration and first-time RF convergence was extremely crucial.

AWR Solution

The AWR Analog Office solution provided a complete and comprehensive environment for Epicom designers to develop the RFIC transceiver. The ability to utilize previous designs in the Analog Office environment, including layout and test benches, was a big plus. The software enabled the Epicom team to tape-out the design on schedule, providing full-chip layout integration and verification, including design rule check (DRC) and layout vs. schematic (LVS) checks to the foundry-supported decks.

The entire design cycle from architecture definition to silicon tape-out was approximately three months. Due to prior experience with the capabilities offered in AWR’s Microwave Office design suite, the Epicom design team had virtually no ramp-up time and no need to learn the intricacies of a new tool. The ability to use the same environment for both GaAs and silicon designs, combined with Analog Office advanced silicon layout capabilities, enabled the designers to focus on the design issues rather than spending time on tool support.

The unified data model common between electrical and physical circuits enabled the designers to complete their layout and meet specifications quickly, without spending valuable time on endless iterations to meet tighter design requirements.

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