Esju and Nokia Networks Use AWR Software for Designing Switching-mode Power Amplifiers
To enable a reliable switching-mode power amplifier design process flow, a trusted RF simulator and accurate transistor models were needed. Microwave Office circuit design bundled with APLAC harmonic balance simulator using Cree’s GaN transistor fully met this requirement. The accuracy of simulations versus measurements was spot on.
Dr. Timo Tarvainen
Technology Director

Esju and Nokia Networks Use AWR Design Environment for Designing Switching-mode Power Amplifiers

Company Profile

Esju Oy is the Finnish technology leader in electromagnetic compatibility (EMC) and RF simulation. The company’s line of business comprises electronics product development, consultancy, research and training as well as EMC laboratory services for customers in telecommunications, defense, process automation and healthcare technology.

The Design Challenge

Facing ongoing stringent time-to-market requirements for new products, Nokia Networks (Nokia) partnered with Esju to create an efficient and accurate design process to deliver first-time-right designs for Nokia’s switching-mode power amplifiers (PAs).

The Solution

Esju, alongside Nokia, developed a Class F amplifier design based on Cree’s 6 watts CGH40006P GaN HEMT transistor. For Class F operation, the harmonic impedances seen by gate and drain must be controlled. Theoretically, zero and infinite impedances were to be provided, but because the transistor was non-ideal, the optimal harmonic impedances were not ideal either.

During the design process, the harmonic impedances were first optimized for maximum efficiency using the AWR Design Environment™ APLAC harmonic balance simulator. The result of the optimization was a design target for actual implementation of the circuitry that was expected to provide the desired impedances, which in this case was a combination of distributed and lumped networks.

When a high performing matching network design was achieved through the use of EM and circuit models, a prototype board was manufactured. To help isolate possible design issues, the circuits were first built separately for the gate and drain sides. The impedances were then also measured and compared against the target.

Finally, the entire amplifier was composed into a single prototype that was measured and compared with simulations. Accuracy of ±1 percent for peak efficiency and ± 1 dB for gain was achieved when compared to the measurements for this Class F design.

The good results not only verified the suitability of the AWR Design Environment for this kind of design, but also provided credibility for the nonlinear transistor model used throughout this work.

In addition, the design team noted that the AWR software was easy to use and the APLAC simulator and high-quality transistor models were very accurate.

AWR would like to thank Cree for making their device models available to Microwave Office software users.

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