IMS2016 MicroApps: Multi-Chip Module Verification and Yield Optimization
In this talk, a design flow is presented for full module simulation, inclusive of all module technologies. This enables designers to leverage the strengths of specialized tools to address various functional block technologies controlled through a single user interface.
The full module simulation includes yield analysis, which allows the designer to understand the design sensitivity to specific component and manufacturing tolerances, as well as see the impact of the variations on the overall design performance.
Presented by: Shane Coffman, AWR Group, NI